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Components > Real-time RF/DSP Hardware > CardBus MIMO I
 

CardBus MIMO I

CardBus MIMO I was our first HW development done exclusively with EURECOM staff.  The PCB was routed by BETECH (St-Jeannet, France) with CADSTAR and fabricated by Synergie CAD. Nextel helped in drafting the schematics and mechanical packaging. It was designed in 2003-2004 and is currently our target platform for application development. To-date 24 cards were fabricated. It is a dual-RF (dual-frequency or dual-antenna) system with both data acquisition and DSP functionality in a very small form-factor (PCMCIA/CardBus).

 

 

a Cardbus MIMO I card with a PCMCIA  Wifi card

 

A complete OpenAirInterface MODEM (5 MHz TDD two-way 2x2 MIMO-OFDM) currently runs on this card where the PC hosts the PHY and MAC-layers in RTAI. At one point, we had a complete SISO-OFDM MODEM running on the FPGA, but as soon as we passed to OFDMA-MIMO we focused on algorithmic development and have not ported our MIMO designs to embedded HW targets (this is part of our current developments with ExpressMIMO.) Currently we are running the LEON3/AMBA embedded system from Gaisler Research which is fully open-source and made available with OpenAirInterface so that partners can at least develop code for the embedded system without having to use "closed-source" tools.

 

Several CardBus MIMO I cards were acquired by Thales Communications in Colombes, France. We still collaborate extensively with them and they contribute extensively to the software development which targets this platform.

 

a Cardbus MIMO I card in a custom box for demonstration

 

 

 

 

Basic Characteristics

 

 

 FPGA Components Xilinx Virtex 2 3000 
 Data Converters  2x AD9832 (dual 14-bit 128Msps D/A, dual 64 Msps A/D)
 RF TX Chipset  2x Maxim MAX2395 (1900-1920MHz) Zero-IF
 RF RX Chipset  2x Maxim MAX2393 (1900-1920MHz) Zero-IF
 TX Power  21 dBm per antenna (30 dB ACLR with 5MHz OFDM)
 RX Noise Figure  6-7 dB at highest gain setting
 GPIO  32-bit GPIO port
 Bus Interface  32-bit PCI (CardBus)
 Configuration  Flash EEPROM, Xilinx JTAG port (FPGA and EEPROM)

 

Technical Documents 

 

CardBus MIMO I Reference Document

CardBus MIMO I Schematics

 

Related Projects

 

CardBus MIMO I is/was part of the following projects:

 

WIDENS (2004-2006)
E2R2
(2006-2008)
COSINUS (2006-2008)
SFR-MIMO (2006-2007)
CHORIST (2006-)

HNPS (starting Summer 2008)

 

 

Outdoor demonstration with CardBus MIMO I during the widens Workshop

 

Legals